It places frequently accessed data close to the processor to help deliver faster performance.
It replaces L3 cache memory.
It speeds up processor performance by purging the current set of instructions and freeing them up to work on the next set of instructions.
It allows the system to address more than 16GB of memory.
第1题：
A. L3 cache operates faster than the system processor
B. L3 cache runs at the speed of the processor.
C. L3 cache can deliver data in as little as 15ns.
D. L3 cache runs at the speed of the system bus.
第2题：
Which of the following connects the L2 cache to the processor?（）
第3题：
A. PCI
B. Frontside bus
C. Backside bus
D. System I/O bus
第4题：
An application server is running slowly. After viewing performance monitoring data it is detected that the disk queue length is high. Which of the following could BEST resolve the situation？（）
第5题：
Which of the following is a function of the XceL4 Cache？（）
第6题：
Which of the following statements is true about L3 cache?（）
第7题：
When installing processors with mixed stepping levels in a server， which of the following guidelines must be followed？ （）
第8题：
A company would like to upgrade an old server to a multi-processor box. The server currently has a single 3.0GHz 1Mb cache processor in it with a single empty socket. The only processor that is available from a manufacturer is a 3.0GHz 2Mb cache model.Which of the following is the BEST reason why this upgrade will not work?（）
A. The socket size does not match
B. The cache is from a different manufacturer
C. The processors do not match
D. Processors cannot be upgraded after server has been deployed
第9题：
A mechanical contractor is deploying a custom application written to take advantage of multithreading features and run in a Windows environment. The customer has read about iDataPlex, BladeCenter, and System x servers. The customer wants to know which processor family will run the application most efficiently. Which of the following questions will provide the required information?（）
第10题：
Which of the following statements is true about L1 cache？（）